PURPOSE: To improve the reliability of a loop type data highway system by providing a microprocessing part with a fault recovery part and a fault detection part respectively, and easily bracketing a fault position to perform adequate error processing.

CONSTITUTION: A microprocessing part 61 is provided with a control status register TR, a receiving buffer RX and a fault recovery part A. The recovery part A discriminates between an error detected by hardware and that by software. An error in transmitting operation based upon the hardware is detected by an HDLC controller 67 provided to a transmission control and sent to the opposite station and when and error in receiving operation occurs, received data is discarded. As for the error detected by the software, on the other hand, a CPU is interrupted through the control status register if, for example, a transmitting-station error occures, reporting error contents.