PURPOSE: To prevent a decline in the memory accessing efficiency of the title system by refreshing all other memory blocks during the wrong hitting cycle of an arbitrary memory block upon detecting the wrong hitting of the arbitrary memory block.

CONSTITUTION: The wrong hitting signal 23 of a memory accessing section 21 makes a refresh requesting signal 28 effective through a NOR circuit 26 and, at the same time, sends wrong hitting information to a forcibly requesting section 29. Similarly, the wrong hitting signal of a memory accessing section 22 makes a refresh requesting signal 27 effective through a NOR circuit 25 and, at the same time, sends wrong hitting information to a forcibly requesting section 29. The section 29 monitors a refresh request sent from a refresh controlling section 18 and wrong hitting signal lines 23 and 24 and, even when a refresh request is issued, requests the memory accessing sections 21 and 22 to make refreshing operations by forcibly making the NOR circuits 25 and 26 effective when no wrong hitting occurs. Thus a decline in the memory accessing efficiency is prevented.