Title:
並列リンクの相対的動的スキュー補償
Document Type and Number:
Japanese Patent JP2005502248
Kind Code:
A
Abstract:
A system performs a two-step skew compensation procedure by first correcting for any phase error alignment between a parallel link clock and data signal edges of each data channel, thereby allowing the received data bits to be correctly sampled. Then, a second step is performed to "word-align" the bits into the original format, which is accomplished with a Skew Synchronizing Marker (SSM) byte in a data FIFO of each data channel. The SSM byte is transmitted on each data channel and terminates the skew compensation procedure. When the SSM byte is detected by logic in the data FIFO of each data channel, the data FIFO employs the SSM byte to initialize the read and write pointers to properly align the output data.
Inventors:
Hansel A. Collins
Application Number:
JP2003525787A
Publication Date:
January 20, 2005
Filing Date:
August 29, 2002
Export Citation:
Assignee:
Hansel A. Collins
International Classes:
G06F11/00; H04L7/00; G06K1/04; G06K5/04; G11B5/00; G11B20/20; H04L25/14; G06K; (IPC1-7): H04L7/00
Attorney, Agent or Firm:
Kazuo Shamoto
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Hideo Tanaka
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Hideo Tanaka