Title:
REPRODUCING CIRCUIT FOR DIGITAL RECORDING SIGNAL
Document Type and Number:
Japanese Patent JPH04134669
Kind Code:
A
Abstract:
PURPOSE:To generate a digital signal with less misreading of data by providing a time adjusting means to reduce the timewise overlap of an analog signal and binary signal each other. CONSTITUTION:A low source voltage Vd generated from a common source voltage Vcc which is applied via a common power source line, through a resistor R and zener diode Z, is applied to the power source terminal of an amplifier 2'. For this amplifier 2', the one having the characteristic such that the delay amount (time) through the amplifier 2' becomes large, is used since the process time becomes slow when the source voltage Vd becomes low. Then, by means of lowering the source voltage Vd than the common source voltage Vcc, the delay amount is made to increase, for instance, then the delay time adjusting means to reduce the overlap of the analog signal and binary signal generating an obstructive signal is provided to make the error rate lower. By this procedure, the analog signal and binary signal become not to be timewise overlapped each other, therefore, the error generation rate of binary signal due to the interference signal can be lowered.
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Inventors:
AOKI TAKASHI
Application Number:
JP25354790A
Publication Date:
May 08, 1992
Filing Date:
September 21, 1990
Export Citation:
Assignee:
OLYMPUS OPTICAL CO
International Classes:
G11B20/10; (IPC1-7): G11B20/10
Attorney, Agent or Firm:
Susumu Ito