Title:
REPRODUCING SIGNAL PROCESSOR AND OPTICAL DISK DEVICE
Document Type and Number:
Japanese Patent JP3927561
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve the synchronous pull-in speed of an PLL for generating a sampling clock to be used for the A/D conversion of a reproducing signal from an optical disk medium and to simultaneously obtain a binary output based on a PRML signal processing system and a binary output based on the other system.
SOLUTION: In the case of generating a sampling clock of an analog/digital (A/D) converter 5 for digitizing a reproducing signal from the optical disk medium 1, an over sampling clock 12 generated by the PLL 100 is used. The zero crossing position information and reference information of a reproduced digital signal 6 obtained by A/D conversion by the over sampling clock 12 are converted into information synchronized with a channel bit clock 14 by an operation period conversion means 9 and the converted information is supplied to a PRML signal processing means 17 and a level discriminating binarizing means 18.
Inventors:
Yoichi Ogura
Toshihiko Takahashi
Kazutoshi Aida
Yoshifumi Okamoto
Toshihiko Takahashi
Kazutoshi Aida
Yoshifumi Okamoto
Application Number:
JP2004181436A
Publication Date:
June 13, 2007
Filing Date:
June 18, 2004
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G11B20/14; G11B20/10; G11B20/18; (IPC1-7): G11B20/14; G11B20/10; G11B20/18
Domestic Patent References:
| JP2004326952A | ||||
| JP2002025203A | ||||
| JP2001339445A | ||||
| JP11126433A | ||||
| JP3008173A |
Attorney, Agent or Firm:
Kenichi Hayase
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