PURPOSE: To release plural flip-flop circuits in an LSI from being reset at the same time.

CONSTITUTION: The output signal of a flip-flops(HFF) 1-8 with hold function for reset starting or signals of AND 1-6-1-1-6-N between output signals of delay lines(DL) 1-4-1-1-5-(N-1) and the output signal of a reset end flip-flop(EFF) 1-7 are inputted as reset inputs to FF circuit groups 1-5-1-1-5-N. Then the reset end flip-flop(EFF) 1-7 is set after the final FF circuit group 1-5-N is reset, and then the HFF1-8 is cleared. When the clearing of the HFF 1-8 extends to the final delay line(DL) 1-4-(N-1) through the delay lines(DL) 1-4-1-1-4-(N-1), the FF circuit groups 1-5-1-1-5-N are released from being reset at the same time through the reset end flip-flop(EFF) 1-7.