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Title:
RESISTOR FORMING METHOD
Document Type and Number:
Japanese Patent JPH05145018
Kind Code:
A
Abstract:

PURPOSE: To realize a resistor forming method capable of easily forming a low resistance and a high resistance by using a common process before patterning.

CONSTITUTION: A polysilicon layer 14 whose resistivity is comparatively high and a silicide layer 16 whose resistivity is comparatively low are formed in order on an insulating film 12 covering the surface of a semiconductor substrate 10. On the laminate, a desired low resistor and a resist layer of a high resistor pattern are arranged, and a polycide layer is selectively etched and patterned by using the resist layer as a mask. When the resist layer is eliminated, a low resistor RD composed of polysilicon silicide residues 14D, 16D are formed, and polysilicon silicide residues 14A, 16A are left so as to correspond with the high resistor pattern. A resist layer is arranged on the upper surface of the substrate so as to cover the right part from an arrow D. By using the resist layer as a mask, selective etching is performed and the silicide residue 16A is eliminated. A high resistor RA composed of the polysilicon 14A can be obtained by eliminating the resist layer.


Inventors:
ASADA KOJI
Application Number:
JP33113191A
Publication Date:
June 11, 1993
Filing Date:
November 20, 1991
Export Citation:
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Assignee:
YAMAHA CORP
International Classes:
H01L27/04; H01L21/822; (IPC1-7): H01L27/04
Attorney, Agent or Firm:
Toshiaki Izawa



 
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