Title:
SAMPLE VALUE CONTROLLER
Document Type and Number:
Japanese Patent JPS63148310
Kind Code:
A
Abstract:
PURPOSE:To improve the response characteristic by forcibly driving a sample switch if a measured value or a set value is changed by a certain extent or more and stopping forcible driving for a certain time after the switch is forcibly driven or an operation output is changed by a certain extent or more. CONSTITUTION:The time chart of a sampling pulse Ps is as shown in a figure (A), and a set value SV is changed step-wise at a time t1 as shown in a figure (B). Then, a forcible reset pulse Pc due to a pulse output P1 of a comparator 8 is generated as shown in a figure (E), and a counter 4 is forcibly reset and a sample switch 2 is driven. Since a timer 13 is started at the time t1 by the pulse Pc, a timer output Pt is generated as shown in a figure (C) to stop generation of the forcible reset pulse for a time T1. Consequently, the forcible reset pulse is not generated even if a pulse output P2 shown in a figure (D) is outputted at a time t2 during the time T1.
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Inventors:
YAMAMOTO SHIGEHIKO
Application Number:
JP29584486A
Publication Date:
June 21, 1988
Filing Date:
December 12, 1986
Export Citation:
Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
G05B21/02; (IPC1-7): G05B21/02
Attorney, Agent or Firm:
Shinsuke Ozawa