Title:
SAMPLING FREQUENCY TAKEOVER CIRCUIT
Document Type and Number:
Japanese Patent JP3527522
Kind Code:
B2
Abstract:
PURPOSE: To reduce the circuit scale by devising a sampling frequency takeover circuit so that write addresses to be discontinuous are designated with simple configuration.
CONSTITUTION: The circuit is provided with a memory 2, a write address generating circuit 4 based on a 1st sampling frequency and a read address generating circuit 5 based on a 2nd sampling frequency. The write address generating circuit 4 consists of a difference generating circuit 27 generating a difference of discontinuous addresses, an adder circuit 17 adding the difference and a preceding discontinuous address to produce a succeeding discontinuous address, and a comparator circuit 20 detecting whether or not the discontinuous address is reached. The difference generating circuit 27 generates the difference of the discontinuous address and the difference is being added to designate the discontinuous address. The difference generating circuit 27 consist of a gate circuit and a small capacity ROM and the circuit scale is reduced.
Inventors:
Okada, Miyuki
Application Number:
JP7897393A
Publication Date:
May 17, 2004
Filing Date:
March 12, 1993
Export Citation:
Assignee:
SONY CORP
International Classes:
H04N9/64; (IPC1-7): H04N9/64
Attorney, Agent or Firm:
杉浦 正知