PURPOSE: To curtail repetitive arithmetic operation, and in addition, to reduce operation quantity to be required newly by correcting a first digital signal (DS) by converting it into a third DS sampled (smpl) by third frequency.

CONSTITUTION: The first DS is converted into the third DS sampled by the third frequency fC. When the output smpl point of a second DS stands between the k-th (k is integer) smpl point and the (k+1)-th smpl point of the third DS, and in addition, it is close sufficiently to a point obtained by dividing interiorly their interval by m:l-m a value (u) is determined from the digital value (y) of each (k-1)-th to (k+2)-th smpl point of the third DS by an expression I. A correction value (c) obtained by multiplying the value (u) by (v) (0<v,0.25) is added with either the digital value y(k) or y(k+1) of the smpl point. The addition/subtraction-corrected digital value Y of the output smpl point of the second DS is determined from an added digital value y'(k) or y'(k+1) obtained by addition and the digital value of smpl point by the expression II or III.