Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SCAN REGISTER CIRCUIT
Document Type and Number:
Japanese Patent JPH0465685
Kind Code:
A
Abstract:

PURPOSE: To attain an exact test for the existence of clock waveform even in the case a time deviation is generated in the clock waveform by providing an RS type FF between a parallel input terminal and strobe terminal of a scan register circuit.

CONSTITUTION: The output A of RS type FF circuit 4 is being zero in the condition that reset signal RESET is given to a reset terminal of the circuit 4, and the output A is set to '1' when the clock is given to a terminal PI. After that, the output A is fetched to the scan register which is formed to plural inverter circuit 1, by means of giving the clock to a strobe signal STB. On the other hand, the output A remains as zero in the case the clock is not given to the terminal PI. Consequently, the signal of terminal PI is always observed in the FF circuit, and the existence of clock waveform is exactly tested even if the time deviation is generted in the waveform.


Inventors:
MAENO HIDESHI
Application Number:
JP17858790A
Publication Date:
March 02, 1992
Filing Date:
July 05, 1990
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F11/22; G01R31/28; (IPC1-7): G01R31/28; G06F11/22
Attorney, Agent or Firm:
Kenichi Hayase



 
Next Patent: JPH0465686