To provide a Schmitt circuit whose integrated area can be decreased.

An input terminal of an input CMOS inverter 1 is connected to a signal input terminal 7, an input terminal of an output CMOS inverter 2 is connected to an output terminal of the input CMOS inverter 1, and a signal output terminal 8 is connected to an output terminal of the output CMOS inverter 2. A gate of a P-channel MOS transistor (TR) 3 and a gate of an N-channel MOS TR 4 are respectively connected to the output terminal of the output CMOS inverter 2. A source of the P-channel MOS TR 3 is connected to a power supply (VDD) terminal and its drain is connected to an output terminal of the input CMOS inverter 1 via a resistor 5. A source of the N-channel MOS TR 4 is connected to a ground (VSS) terminal and its drain is connected to the output terminal of the input CMOS inverter 1 via a resistor 6.