SECURITY CHIP, PROGRAM, INFORMATION PROCESSING DEVICE, AND INFORMATION PROCESSING SYSTEM

Japanese Patent JP2014053675

A

To perform inexpensive, high-speed and secured apparatus authentication.

Provided is a security chip having tamper-resistance which comprises: an acquisition unit which acquires information that is transmitted from a device performing challenge response authentication and is unique to the device; a storage unit which stores second key information that can be used for generating first key information to be used by the device for the challenge response authentication from the unique information; and a generation unit which generates the first key information from the unique information by using the second key information. On the basis of a challenge transmitted by the device by using the first key information, a response to be transmitted to the device is generated. In the device, the first key information is not stored in the security chip having tamper-resistance.

YOSHIMI HIDEAKI

JP2012195126A

March 20, 2014

September 05, 2012

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SONY CORP

H04L9/32; G06F21/62; G06F21/77; H04L9/08

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Miaki Kametani
Tetsuo Kanamoto
Koji Hagiwara
Kazuki Matsumoto

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