PURPOSE: To check a reset signal generated at the ON of an electric power supply by a system itself by checking that the rise of a pulse signal exists between the 1st and 2nd time constants to check the reset signal.

CONSTITUTION: The time constant Ra.Ca of the 1st time constant circuit 1 and the time constant Rb.Cb of the 2nd time constant circuit 2 are set up to different values respectively. When the power supply VCC is inputted at a certain time t1, pulse signals A, B having different width respectively are outputted on the basis of the difference between the 1st and 2nd time constants. Since these outputs supply H-level signals to both the inputs of an exclusive NOR circuit 3 for a period between times t1 and t2, an output C generated between the t1 and t2 is turned to the H-level. On the other hand, the pulse A is decayed at the time t2 and the pulse B is still kept at the H-level, so that the output C is turned to the L-level, and at the delay of the pulse B at a time t4, the output C is turned to the H-level. If the time constants are set up so that the reset signal is raised from the L to H-level at a time t3 between the time t2 and t4, a latch circuit 4 detects the rise of the reset signal and outputs an inverted Q output to a CPU.