Title:
SEMICONDUCTOR AMPLIFIER
Document Type and Number:
Japanese Patent JP3439344
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce power consumption by miniaturizing a distortion compensation circuit.
SOLUTION: A characteristic improvement circuit 10 composed of a passive circuit comprising a capacitor 5, a resistor 6 and an inductor 7, and of a common source drain FET 8 connected to the passive circuit is connected between input matching circuits 2 and 3 for an amplification nonlinear amplifier element (FET1). In the characteristic improvement circuit 10, a gate capacitance of the FET 8 increases as an input level increases, a passing gain increases and a passing phase is decreased. A phase characteristic and a distortion characteristic of the amplifier at an output level are improved by compensating the characteristic of the FET1 according to the characteristic above. Since the characteristic improvement circuit 10 is configured on a same printed circuit board for the input matching circuits 2 and 3, the semiconductor amplifier is made small. Since the capacitor 5 blocks a DC current, the power consumption is not increased.
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Inventors:
Takaharu Matsunaga
Application Number:
JP17145298A
Publication Date:
August 25, 2003
Filing Date:
June 18, 1998
Export Citation:
Assignee:
NEC
International Classes:
H03F1/32; H03F3/193; (IPC1-7): H03F1/32; H03F3/193
Domestic Patent References:
| JP63292708A | ||||
| JP2137256A | ||||
| JP9246873A | ||||
| JP11355055A |
Attorney, Agent or Firm:
Masahiko Desk (2 outside)