Title:
SEMICONDUCTOR CHIP, FABRICATION THEREOF, SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3229185
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce the possibility of open-circuit failures caused by peeling of junctions of bump electrodes or caused by step breaking of chip wiring lines in a transistor element and thus to reduce the possibility of stress causing damages to the transistor element.
SOLUTION: An input/output terminal bump electrode 820 is adjustably provided on an peripheral edge part of a semiconductor chip base 500 through a lower structure 612 disposed therebetween, so that a total height hs of the lower structure 612 and bump electrode 820 from a surface of the semiconductor chip base 500 is greater than a height ht of an element bump electrode 810. This enables reduction of stress imposed on a transistor element 600 at the time of mounting a semiconductor chip 400 on a wiring board to thereby increase a bonding strength of the input/ output terminal bump electrode 820 as a junction, Step breaking can be prevented by making large a lower chip wiring part of the input/output terminal bump electrode 820, forming a polyimide coating film on a side face, or forming the lower structure 612 into a mesa shape.
Inventors:
Noriko Kakimoto
Hiroya Sato
Masatomo Hasegawa
Hiroya Sato
Masatomo Hasegawa
Application Number:
JP33961095A
Publication Date:
November 12, 2001
Filing Date:
December 26, 1995
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H01L29/73; H01L21/321; H01L21/331; H01L21/60; H01L23/12; H01L29/737; (IPC1-7): H01L21/60; H01L21/331; H01L29/73
Domestic Patent References:
| JP6349846A | ||||
| JP6104275A | ||||
| JP2105420A | ||||
| JP6251742U |
Attorney, Agent or Firm:
Keiichiro Saikyo