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Title:
SEMICONDUCTOR DEVICE HAVING CAPACITIVE ELEMENT, AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2002100745
Kind Code:
A
Abstract:

To provide a semiconductor device which enables easy formation of a multilayer metal interconnection and causes no deterioration of a capacitive element, and uses a ceramic thin-film capacity.

The ceramic thin-film capacity 30 and a diffusion layer 4 are connected by a plug having a multilayer structure of metal interconnections 7 and 10, and a via 9 which is formed at the same time as the formation of the multilayer metal interconnections. Then, after forming the multilayer metal interconnections and before forming the ceramic thin-film capacity 30, it is subjected to hydrogen annealing. Since the ceramic thin-film capacity 30 is formed after the multilayer metal interconnections are formed, there is no difficulty in forming the multilayer metal interconnections caused by a difference in level due to the capacity. Furthermore, there is no need for forming a via with a tungsten plug after forming the capacity, and no deterioration results in the capacity due to CVD of tungsten is produced. Since the capacity can be formed without changing any of the process device of a logic circuit sections, existing design parameters can be used.


Inventors:
AMANUMA KAZUSHI
Application Number:
JP2001279548A
Publication Date:
April 05, 2002
Filing Date:
March 01, 1999
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/768; H01L21/8242; H01L21/8246; H01L27/10; H01L27/105; H01L27/108; (IPC1-7): H01L27/105; H01L21/768; H01L21/8242; H01L27/10; H01L27/108
Domestic Patent References:
JPH09293843A1997-11-11
JPH1022470A1998-01-23
JPH0969615A1997-03-11
JPH0799290A1995-04-11
JPH07106435A1995-04-21
JPH08335673A1996-12-17
JPH1022469A1998-01-23
Attorney, Agent or Firm:
Hiro Amano