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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPS54125985
Kind Code:
A
Abstract:

PURPOSE: To ensure the high-accuracy formation of minute electrode window while keeping a matching between the semiconductor layer and the edge of the insulator layer by using SiO2, Si3N4 and the polyimide-group resin which feature the different etching solutions.

CONSTITUTION: Si3N43 is provided on SiO22 on P-type Si substrate 1. and film 3 is etched selectively via the heat phosphoric acid. Poly Si layer 4 is provided at the opening part through the photo etching method, and SiO22 is removed selectively via the HF-group solution. With the phosphorus diffusion given through the opening, N-layer 7 and 8 are obtained, and layer 4 features the conductive property to be covered with SiO29 and 10. After this, polyimide resin 11 is coated up to the same level as layer 4 with the heat treatment applied, and then the photo etching is given under the semi-hardened state to drill opening 12 and 13. The etching solution uses the aqueous solution of 40∼80 hydrazine and does not etch film 2 and 3, thus a high- accuracy not required for opening 12 and 13. Then a heat-treatment is given at about 300°C to secure hardening. Film 9 and 10 are then etched selectively via the HF-group solution to form Al wirings 14∼16. Thus, the matching is secured between wiring 14/15 and N-layer 7/8 with no short circuit caused to the adjacent regions.


Inventors:
USUDA KOUJI
Application Number:
JP3307178A
Publication Date:
September 29, 1979
Filing Date:
March 24, 1978
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L29/78; H01L21/302; H01L21/306; H01L21/3213; H01L21/331; H01L29/06; H01L29/73; (IPC1-7): H01L21/302; H01L21/88; H01L29/06; H01L29/78