Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2023135297
Kind Code:
A
Abstract:
To improve performance of a semiconductor device including a trench gate type MOSFET in which a p-type impurity is introduced into a bottom of a groove buried with a gate electrode.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: forming a plurality of grooves D1 on a principal surface of an n-type semiconductor substrate SB; forming a p-type semiconductor region R1 in the semiconductor substrate SB by introducing a p-type impurity and carbon into a bottom surface or a side surface of each groove D1; forming a gate electrode via an insulation film inside each of the plurality of grooves D1; and forming a p-type second semiconductor region in the semiconductor substrate SB in contact with a side surface of the groove D1 between adjacent grooves D1.SELECTED DRAWING: Figure 3
Inventors:
OMIZU YUTO
ABIKO YUYA
ABIKO YUYA
Application Number:
JP2022040435A
Publication Date:
September 28, 2023
Filing Date:
March 15, 2022
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L29/78; H01L21/265; H01L21/336; H01L21/8234; H01L29/06; H01L29/41
Attorney, Agent or Firm:
Patent Attorney Tsutsui International Patent Office