半導体装置およびその製造方法 - Nippon Telegraph and Telephone Corporation

Title:

半導体装置およびその製造方法

Document Type and Number:

Japanese Patent JP7392842

Kind Code:

B2

Abstract:

A semiconductor device (field effect transistor) includes a gate insulating layer between both of a bottom part and a lateral surface of a recess part and a penetration portion of a gate electrode. The gate insulating layer is composed of an oxide of a substance which a barrier layer is composed of For example, the gate insulating layer is composed of a layer of In oxide and a layer of Al oxide.

Inventors:

Takuya Tsutsumi
Hideaki Matsuzaki

Application Number:

JP2022522090A

Publication Date:

December 06, 2023

Filing Date:

May 11, 2020

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Assignee:

Nippon Telegraph and Telephone Corporation

International Classes:

H01L21/338; H01L21/28; H01L21/336; H01L29/41; H01L29/423; H01L29/49; H01L29/778; H01L29/78; H01L29/812

Domestic Patent References:

JP9092660A
JP2004311869A
JP2013229499A
JP2005260172A

Attorney, Agent or Firm:

Shigeki Yamakawa
Yuzo Koike
Masaki Yamakawa
Yasushi Motoyama

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