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Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH0399466
Kind Code:
A
Abstract:

PURPOSE: To prevent a leakage current from flowing into an element due to an interfacial instability by a method wherein the element is formed on an island-like semiconductor layer isolated through the intermediary of an insulating layer, and a second gate electrode is formed at an interface between the base of the channel region of the element and the insulating layer.

CONSTITUTION: A MESFET composed of N+-type source and drain regions 8 and 10, an N-type channel region sandwiched between the regions 8 and 10, a source electrode 14, a drain electrode 16, and a first gate electrode 18, the three electrodes being formed on these regions respectively, is formed on an island-like semi-insulating GaAs layer 6. As an adjacent element is formed on another island-like semi-insulating GaAs layer through the intermediary of an insulating layer 4, the adjacent elements are prevented from electrically affecting each other and consequently a side gate effect is restrained. As a second gate electrode 20 is formed at the interface between the base of the channel region 12 and the insulating layer 4, a leakage current, which is induced due to an interfacial instability which occurs when the base of the channel region is in direct contact with the insulating layer 4, can be prevented from flowing into the channel region 12.


Inventors:
ONODERA TSUKASA
Application Number:
JP23597489A
Publication Date:
April 24, 1991
Filing Date:
September 12, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L27/088; H01L21/8234; H01L29/78; H01L29/786; H01L29/80; (IPC1-7): H01L27/088; H01L29/784; H01L29/804
Attorney, Agent or Firm:
Yoshito Kitano



 
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