To provide a semiconductor device, which is constituted by providing a junction compensating region on the surface layer, which is positioned at the part of the contact between a source diffused layer and a drain diffused layer, of a semiconductor substrate, and has a structure, wherein even though an element structure is miniaturized, deterioration of the characteristics of a transistor due to the junction compensating region can be prevented, and a method of manufacturing the semiconductor device.

In a semiconductor device having a gate electrode 5 formed on a semiconductor substrate 1, source and drain diffused layers 8 provided on the side of the surface of the substrate 1, which is located under the sides of the electrode 5, and a junction compensating region 12 provided on the side of the surface of the substrate 1, which is located at the part of the contact between the layers 8, the gate length L of the electrode 5 is one shorter than 0.13 μm and the interval A between the region 12 and the electrode 5 is set so that the interval A is an interval of at least 0.07 μm.