Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD, PROBE PIN, AND TESTING DEVICE
Document Type and Number:
Japanese Patent JP2022063564
Kind Code:
A
Abstract:
To suppress the manufacturing cost of a semiconductor device.SOLUTION: A probe pin PB includes a spring SP and plungers PR1, PR2 arranged so as to face each other across the spring SP. A tip ST1 of the plunger PR1 and a tip ST2 of the plunger PR2 have a symmetrical structure so that both can be connected to the lead LD of a semiconductor device PKG. The tip ST1 of the plunger PR1 comes into contact with the lead LD, and the tip ST2 of the plunger PR2 fits in a hole HL of a test board TB, with the lead LD of the semiconductor device PKG and an electrode EL of the test board TB electrically connected together via the probe pin PB, as a flange part FG2 of the plunger PR2 comes into contact with the electrode EL in the periphery of the hole HL in the test board TB.SELECTED DRAWING: Figure 4
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Inventors:
ISHII TOSHITUGU
Application Number:
JP2020171895A
Publication Date:
April 22, 2022
Filing Date:
October 12, 2020
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G01R31/26; G01R1/067; G01R1/073; G01R31/28
Attorney, Agent or Firm:
Tsutsui International Patent Office