Title:
半導体装置の製造方法、半導体装置の評価方法および半導体装置
Document Type and Number:
Japanese Patent JP6404591
Kind Code:
B2
Abstract:
A semiconductor device that includes a plurality of trench gate structures each having a gate electrode extending in a depth direction of an element, the plurality of trench gate structures including first trench gate structures respectively contributing to control of the element and second trench gate structures respectively not contributing to the control of the element, the semiconductor device including an electrode portion having a potential other than a gate potential, and an electrode pad that is disposed on a front face of a semiconductor substrate, wherein the electrode pad is used as a terminal to apply a predetermined voltage to gate insulator films, in screening that is executed by applying the predetermined voltage to the gate insulator films respectively in contact with the gate electrode connected to the electrode pad and that is executed before the electrode pad is short-circuited to the electrode portion.
Inventors:
Seiji Momota
Kazu Abe
Kenji Kono
Hiromitsu Tanabe
Kazu Abe
Kenji Kono
Hiromitsu Tanabe
Application Number:
JP2014089124A
Publication Date:
October 10, 2018
Filing Date:
April 23, 2014
Export Citation:
Assignee:
富士電機株式会社
株式会社デンソー
株式会社デンソー
International Classes:
H01L21/336; H01L21/28; H01L21/66; H01L29/423; H01L29/49; H01L29/739; H01L29/78
Domestic Patent References:
| JP2010050211A | ||||
| JP2014053552A | ||||
| JP2008053623A | ||||
| JP2005101218A | ||||
| JP2013183143A | ||||
| JP2013251466A |
Attorney, Agent or Firm:
Akinori Sakai