To provide a semiconductor device, in which a memory device and logic equipment are merged.
There are included a split gate electrode structure 130 formed on a memory cell region of a substrate 100, which is shared into the memory cell region and a logic region; a silicon oxide film 132 formed on front surfaces of the split gate electrode structure 130 and the substrate 100; a word line 150 contained on both side views of the split gate electrode structure 130, in which the silicon oxide film 132 is formed, with a lower part side view of the word line 150 projecting in the side direction, as compared with an upper part side view of the word line 150; and a logic gate pattern 152 which is formed in the logic region and has a smaller thickness, as compared with the channel length of the word line 150. The lower part side view of the word line 150 is projected, to increase the channel length.
LEE DON-WOO
KEN TETSUJUN
YOON IN-GU
LEE YONG-SUN
PARK JAE-HYUN
MOON JUNG-HO
Yasuo Nara
Etsuko Saito
Katsuyuki Utani
Toshifumi Fujii