To provide a device and the manufacturing method of the same for controlling deterioration of semiconductor chip due to a stress in the semiconductor device of the semiconductor chip lamination type.

The semiconductor device comprises a die pad 200, a first semiconductor chip 4 including a first electrode 47 on the surface 41 and fixing a rear surface 42 to the die pad 200, a second semiconductor chip 5 including a second electrode 57 to the surface 51 and fixing the rear surface 52 to the surface 41 of the first semiconductor chip 4, lead terminals 210 and 220 connected with the first and second electrodes 47, 57, and a resin sealing body 10. A part 207 is formed through the region where the semiconductor chip 5 of the die pad 200 is mounted. The edge 54 of the second semiconductor chip 5 is projected from the edge 44 of the first semiconductor chip 4, and the edge 202 of the die pad 200 is projected from the edge 44 of the first semiconductor chip 4 in the side where the edge of the second semiconductor chip 5 is projected from the edge of the first semiconductor chip 4.