SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF

Title:

SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF

Document Type and Number:

Japanese Patent JP2009188250

Kind Code:

A

Abstract:

To obtain a high yield, to sufficiently reduce inter-wiring capacity, and to obtain sufficient mechanical strength.

The semiconductor device has a first interlayer insulating film 101 formed on a semiconductor substrate, a plurality of wiring lines 105 formed on the first interlayer insulating film 101, and a via 113 and a dummy via 106 formed in the first interlayer insulating film 101 to connect with at least one of the plurality of wiring lines 105. A gap portion 109 is selectively formed between adjacent wiring lines 105 on the first interlayer insulating film 101, the dummy via 106 is formed below a wiring line 105A contacting the gap portion 109 while connected to the wiring 105A, and the via 113 and dummy via 106 have circumferences covered with the first interlayer insulating film 101 with the gap portion 109 not interposed.

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Inventors:

SHIBATA JUNICHI
HARADA TAKASHI
UEKI AKIRA

Application Number:

JP2008027726A

Publication Date:

August 20, 2009

Filing Date:

February 07, 2008

Export Citation:

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Assignee:

PANASONIC CORP

International Classes:

H01L21/768; H01L21/3205; H01L23/52; H01L23/522

Attorney, Agent or Firm:

Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura

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