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Title:
半導体装置、およびその製造方法
Document Type and Number:
Japanese Patent JP7260153
Kind Code:
B2
Abstract:
The semiconductor device and the method of fabricating the same includes, on a surface of a semiconductor substrate 1 of a first conductivity type which is P-type or N-type, a diode element using a PN junction including a high-concentration first conductivity type impurity region 6 of the first conductivity type, a high-concentration second conductivity type impurity region 5 of a second conductivity type that is a conductivity type opposite to the first conductivity type, and an element isolation region 2 sandwiched between the high-concentration first conductivity type impurity region and the high-concentration second conductivity type impurity region, and a floating layer 3 of the second conductivity type separated from the high-concentration second conductivity type impurity region below the high-concentration second conductivity type impurity region on the semiconductor substrate.

Inventors:
Hiroyuki Tanaka
Masahiko Higashi
Application Number:
JP2019069320A
Publication Date:
April 18, 2023
Filing Date:
March 29, 2019
Export Citation:
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Assignee:
LAPIS Semiconductor Co., Ltd.
International Classes:
H01L21/265; H01L21/822; H01L21/329; H01L21/76; H01L27/04; H01L29/06; H01L29/861; H01L29/868
Domestic Patent References:
JP2010157636A
JP2006324412A
JP2009188178A
Foreign References:
US20160104781
Attorney, Agent or Firm:
Kato Kazuho
Hiroshi Fukuda