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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND METHOD FOR DESIGNING THE SAME
Document Type and Number:
Japanese Patent JP2004054559
Kind Code:
A
Abstract:

To provide a method for designing a semiconductor device capable of preventing the deterioration of performance, and automatically arranging wiring in the periphery of the terminal of a functioning block.

This method for designing a semiconductor device is provided with a step (a) for arranging hard macros 2 to 5, a step (b) for setting first ranges 6 to 9 with not more than a first distance from the outer edges of the hard macros 2 to 5 and second ranges 10 to 13 with not less than the first distance from the outer edges of the hard macros 2 to 5 and with not more than a second distance from terminals C1 to C4 in an area where the arrangement of primitive cells is inhibited, a step (c) for automatically arranging a the primitive cells in any area other than the area where the arrangement of the plurality of primitive cells is inhibited, and a step (d) for automatically arranging wiring connecting the terminals C1 to C4 to the primitive cells.


Inventors:
ANDO TATSUYA
Application Number:
JP2002210709A
Publication Date:
February 19, 2004
Filing Date:
July 19, 2002
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G06F17/50; H01L21/82; (IPC1-7): G06F17/50; H01L21/82
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa