To provide a semiconductor device and a method of manufacturing the same, capable of assuring an enough formation region for a wide fringe pattern even if a space between adjoining wirings is smaller.
A semiconductor device includes wirings. The 3n+1 wiring extends between the 3n wiring and the 3n+2 wiring, and the 3n, 3n+1, and 3n+2 wirings are formed in a group. A first fringe pattern is positioned at an end part of the 3n wiring and is formed with a line thicker than that of the 3n wiring. A second fringe pattern is positioned at an end part of the 3n+1 wiring, and is formed in a line thicker than that of the 3n+1 wiring. A third fringe pattern is positioned at an end part of the 3n+2 wiring and is formed in line thicker than that of the 3n+2 wiring. An arrangement region of the second fringe pattern is provided on a near side than the end part of each wiring where the first fringe pattern and the third fringe pattern are arranged.
NAGASHIMA MASASHI