Title:
半導体装置、及び半導体装置の動作方法
Document Type and Number:
Japanese Patent JP7457006
Kind Code:
B2
Abstract:
A semiconductor device storing data as a multilevel potential is provided. The semiconductor device includes a memory cell, first and second reference cells, first and second sense amplifiers, and first to third circuits. The first circuit has a function of outputting, to a first wiring and a third wiring, a first potential corresponding to a first signal output from the memory cell. The second circuit has a function of outputting, to a second wiring, a first reference potential corresponding to a second signal output from the first reference cell. The third circuit has a function of outputting, to the fourth wiring, a second reference potential corresponding to a third signal output from the second reference cell when a second switch is in an off state. The first sense amplifier refers to the first potential and the first reference potential and changes potentials of the first wiring and the second wiring. The second sense amplifier refers to the first potential and the second reference potential and changes potentials of the third wiring and the fourth wiring.
Inventors:
Takanori Matsuzaki
Tatsuya Onuki
Yuki Okamoto
Toshiki Hamada
Tatsuya Onuki
Yuki Okamoto
Toshiki Hamada
Application Number:
JP2021515316A
Publication Date:
March 27, 2024
Filing Date:
April 15, 2020
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G11C7/06; G11C7/12; G11C7/14; G11C11/405; G11C11/4091; G11C11/4097; G11C11/56; H01L21/336; H01L29/786; H01L29/788; H01L29/792
Domestic Patent References:
| JP63149900A | ||||
| JP2016219089A | ||||
| JP201654282A |
Foreign References:
| WO2019003045A1 |