Title:
半導体装置及びその動作方法
Document Type and Number:
Japanese Patent JP7169942
Kind Code:
B2
Abstract:
In a semiconductor device including a lockstep function, conflicts of bus accesses by a plurality of processors are suppressed. The semiconductor device includes a first processor, a second processor for monitoring operation of the first processor in a first mode, first and second buses, first and second non-shared resources dedicated to either the first or second processor in a second mode, and a first selector for selecting a bus for transferring interface signals between the second processor and the selected bus. In a second mode in which the first and second processors execute different instructions, the first selector selects the second bus. In the second mode, the first non-shared resource is accessed by the first processor via the first bus and the second non-shared resource is accessed by the second processor via the second bus.
Inventors:
Yoshitaka Taki
Masaaki Tanimoto
Masaaki Tanimoto
Application Number:
JP2019111998A
Publication Date:
November 11, 2022
Filing Date:
June 17, 2019
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
G06F13/14; G06F11/18; G06F13/36
Domestic Patent References:
| JP2010198131A | ||||
| JP2019016107A | ||||
| JP7182189A | ||||
| JP9066983A |
Attorney, Agent or Firm:
Polar Patent Attorney Corporation
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