Title:
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
Document Type and Number:
Japanese Patent JP3406753
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make a size of a semiconductor module small, along with a good withstanding voltage.
SOLUTION: An outer terminal 7 is projected from a side wall of a sealing resin 2, and a heat sink 1 is exposed from a bottom face of a sealing resin 2. The sealing resin 2 surrounding a boundary edge part of the heat sink 1 has a step face 21 recessed from an exposed face of heat sink 1. When the semiconductor device is used, the exposed face of the heat sink 1 is put in facial contact with a flat face 41a of a heat radiating fin 41, while an insulating sheet 31 is put and pressed between the step face 21 and the flat face 41a under pressure. The insulating sheet 31 is formed in a way that the flat face 41a facing to the outer terminal 7 is covered with the insulating sheet 31. Then, the height of the outer terminal 7 from the exposed face of the heat sink 1 is made smaller than a length usually defined by a rated voltage, while a withstanding voltage between the outer terminal 7 and the heat radiating fin 41 is kept constant at the rated voltage.
Inventors:
Go Love Majmudar
Satoshi Mori
Yuhisa Noda
Toru Iwakami
Yoshio Takagi
Hisashi Kawato
Satoshi Mori
Yuhisa Noda
Toru Iwakami
Yoshio Takagi
Hisashi Kawato
Application Number:
JP31255895A
Publication Date:
May 12, 2003
Filing Date:
November 30, 1995
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L23/29; H01L23/31; H01L23/36; H01L23/433; H01L23/495; H01L23/50; (IPC1-7): H01L23/29
Domestic Patent References:
| JP62282451A | ||||
| JP6139554A | ||||
| JP1174956U | ||||
| JP62204340U |
Attorney, Agent or Firm:
Shigeaki Yoshida (2 outside)