Title:
SEMICONDUCTOR DEVICE OUTER LEAD PLATING METHOD AND DEVICE, AND SEMICONDUCTOR DEVICE MANUFACTURED BY USE OF THEM
Document Type and Number:
Japanese Patent JPH0661395
Kind Code:
A
Abstract:
PURPOSE: To prevent plating tailings from being generated on the surface of outer leads of a lead frame and to protect a plating layer on the outer lead against cutting.
CONSTITUTION: A semiconductor device 1 formed into a final shape is enveloped in the non-conductive die composed of an upper die 2 and a lower die 3 so as to form an empty space around its outer lead 1a, and plating solution is filled into a plating chamber 5 provided around the outer lead 1a, whereby the outer lead 1a is plated by deposition.
Inventors:
KOBAYASHI SHOICHI
Application Number:
JP21188992A
Publication Date:
March 04, 1994
Filing Date:
August 10, 1992
Export Citation:
Assignee:
HITACHI LTD
HITACHI YONEZAWA DENSHI KK
HITACHI YONEZAWA DENSHI KK
International Classes:
C25D7/00; C25D7/12; C25D17/00; H01L23/50; (IPC1-7): H01L23/50; C25D7/12; C25D17/00
Attorney, Agent or Firm:
Yamato Tsutsui
Next Patent: 浮遊体推進機構