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Title:
SEMICONDUCTOR DEVICE, SOLID STATE IMAGING DEVICE, AMPLIFICATION TYPE SOLID STATE IMAGING DEVICE, IMAGE PICK-UP SYSTEM, MASK EQUIPMENT, AND EXPOSURE DEVICE
Document Type and Number:
Japanese Patent JP2005183600
Kind Code:
A
Abstract:

To suppress the variance of shapes of unit elements of a connection part and other unit elements arranged periodically in a semiconductor device where the unit elements are formed by periodical patterns and a part of the pattern is combined with a buffering area to make a connection part of exposure.

In the semiconductor device, photodiode 102a, 102b and wiring 101A and 101B for driving them are arranged periodically at a prescribed pitch C-C' at least at a part of a semiconductor substrate 100. The semiconductor substrate 100 is divided into a first area exposed and formed by a first reticle, and a second area exposed and formed so as to be mutually connected with the first part of the first area by a second reticle. Nearly the same shapes 111A and 111B as a shape 111 formed by the double exposure of the connection part connecting the first and second areas are previously formed at a place periodically corresponding to the position of the connection part in the periodically arranged unit element other than the connection part.


Inventors:
TAKADA HIDEAKI
OKITA AKIRA
HIYAMA TAKUMI
TAMURA SEIICHI
Application Number:
JP2003421031A
Publication Date:
July 07, 2005
Filing Date:
December 18, 2003
Export Citation:
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Assignee:
CANON KK
International Classes:
G03F1/68; G03F1/70; G03F7/20; H01L21/027; H01L27/146; (IPC1-7): H01L21/027; G03F1/08; G03F7/20; H01L27/146
Attorney, Agent or Firm:
Jyohei Yamashita
Hiroshi Shimura