To suppress the variance of shapes of unit elements of a connection part and other unit elements arranged periodically in a semiconductor device where the unit elements are formed by periodical patterns and a part of the pattern is combined with a buffering area to make a connection part of exposure.
In the semiconductor device, photodiode 102a, 102b and wiring 101A and 101B for driving them are arranged periodically at a prescribed pitch C-C' at least at a part of a semiconductor substrate 100. The semiconductor substrate 100 is divided into a first area exposed and formed by a first reticle, and a second area exposed and formed so as to be mutually connected with the first part of the first area by a second reticle. Nearly the same shapes 111A and 111B as a shape 111 formed by the double exposure of the connection part connecting the first and second areas are previously formed at a place periodically corresponding to the position of the connection part in the periodically arranged unit element other than the connection part.
JP3322007 | INDUSTRIAL APPLICABILITY: Halftone phase shift mask and resist exposure method |
JPH0431858 | MANUFACTURE OF MASK |
JPH02260414 | X-RAY EXPOSURE MASK |
OKITA AKIRA
HIYAMA TAKUMI
TAMURA SEIICHI
Hiroshi Shimura