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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2009194369
Kind Code:
A
Abstract:

To provide a technology for improving production yield and product reliability in a semiconductor device having a triple-well structure.

The semiconductor device includes an n-channel type field effect transistor 254n formed in a p-type well 252 in a deep n-type well 200 formed in a p-type substrate 1, and a p-channel type field effect transistor 254p formed in a shallow n-type well 251. An inverter circuit INV1 that does not contribute to circuit operation is formed. A shallow p-type well 252 is connected to the substrate 1 using a first interconnect 253(M1). The gate electrode of a p-channel type field effect transistor 254p and n-channel type field effect transistor 254n are connected to a shallow n-type well 251 using an uppermost interconnect 255(M8).


Inventors:
FUJII MASAKO
OBAYASHI SHIGEKI
MORINO NAOZUMI
HIRAIWA ATSUSHI
WATARAI SHINICHI
YOSHIDA TAKESHI
KOSHIHISA KAZUTOSHI
SUGIYAMA MASAO
KONDO YOSHINORI
EGAWA YUICHI
KANEKO YOSHIYUKI
Application Number:
JP2008311085A
Publication Date:
August 27, 2009
Filing Date:
December 05, 2008
Export Citation:
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Assignee:
RENESAS TECH CORP
International Classes:
H01L21/8238; H01L21/3205; H01L21/822; H01L21/8234; H01L23/52; H01L27/04; H01L27/06; H01L27/092
Attorney, Agent or Firm:
Yamato Tsutsui