To improve the reliability of a multilayer semiconductor device.
The multilayer semiconductor device includes: an SOC 1 that is flip-chip connected to a lower first wiring board 3; an SDRAM 2 that is flip-chip connected to an upper second wiring board 4; multiple second ball electrodes 6 that connect the first wiring board 3 and the second wiring board 4; and multiple first ball electrodes 5 that are connected to a first lower surface 3b of the first wiring board 3. A second metal layer 4c and a second insulation layer 4d disposed on the second metal layer 4c are provided in the second wiring board 4, and the upper SDRAM 2 is disposed above the second insulation layer 4d of the second wiring board 4. Thanks to this structure, a heat dissipation path 12a of the lower SOC 1 and a heat dissipation path 12b of the upper SDRAM 2 can be separated from each other, and heat generated in the lower SOC 1 can be dissipated to a mounting substrate 11.
SUGITA NORIHIKO
HYUGA HIROYUKI
SUWA MASATO
