Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3941541
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device which avoids lowering the operating speed or malfunctioning by dispersing the noise.
SOLUTION: The semiconductor device comprises: an N-well 5 formed in a semiconductor substrate 1; P-wells 6, 7 formed opposite across the N-well 5 therein; a plurality of input/output circuits including input circuits having a plurality of transistors formed in the N-well 5 and a plurality of transistors formed in the first P-well and output circuits having a plurality of transistors formed in the N-well 5 and a plurality of transistors formed in the second P-well; potential feed lines 8 connected to the plurality of transistors formed in the N-well 5; potential feed lines 9 connected to the plurality of transistors formed in the P-well 6; and potential feed lines 10 connected to the plurality of transistors formed in the P-well 7.
Inventors:
Uematsu Satoru
Application Number:
JP2002050465A
Publication Date:
July 04, 2007
Filing Date:
February 26, 2002
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G11C11/41; H01L21/822; G11C11/413; H01L21/8238; H01L21/8242; H01L27/04; H01L27/092; H01L27/10; H01L27/108; (IPC1-7): H01L21/822; G11C11/41; G11C11/413; H01L21/8238; H01L21/8242; H01L27/04; H01L27/092; H01L27/10; H01L27/108
Domestic Patent References:
| JP55093235A | ||||
| JP2000332201A |
Attorney, Agent or Firm:
Masaaki Utsunomiya
Mutsumi Yanase
Harada victory
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa
Mutsumi Yanase
Harada victory
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa