Title:
半導体装置
Document Type and Number:
Japanese Patent JP4137929
Kind Code:
B2
Abstract:
In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second electrode pads dedicated to plate wiring are provided on an inner part away from the edge of the semiconductor chip. Further, the first and second electrode pads are connected via metal bypass layers, respectively. In the case of wire bonding, the first and third electrode pads are used and the third electrode pads are encapsulated with an insulating layer. Further, in the case of plate wiring, the second and third electrode pads are used and the first electrode pads are covered with an insulating layer. This realizes a semiconductor chip which has great versatility and which can be used in semiconductor packages of various types.
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Inventors:
Hiroyuki Nakanishi
Haruya Mori
Haruya Mori
Application Number:
JP2005289429A
Publication Date:
August 20, 2008
Filing Date:
September 30, 2005
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H01L23/12; H01L21/3205; H01L23/52
Domestic Patent References:
| JP8222571A | ||||
| JP200360127A |
Attorney, Agent or Firm:
Kenzo Hara International Patent Office