Title:
Semiconductor device
Document Type and Number:
Japanese Patent JP6068829
Kind Code:
B2
Abstract:
A content addressable memory has many elements in one memory cell; thus, the area of one memory cell tends to be large. In view of the above, it is an object of an embodiment of the present invention to reduce the area of one memory cell. Charge can be held with the use of a channel capacitance in a reading transistor (capacitance between a gate electrode and a channel formation region). In other words, the reading transistor also serves as a charge storage transistor. One of a source and a drain of a charge supply transistor is electrically connected to a gate of the reading and charge storage transistor.
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Inventors:
Daisuke Matsubayashi
Application Number:
JP2012108657A
Publication Date:
January 25, 2017
Filing Date:
May 10, 2012
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G11C15/04; H01L21/8242; H01L27/108; H01L29/786
Domestic Patent References:
| JP5101681A | ||||
| JP2011171702A |
Foreign References:
| US3701980 | ||||
| US20110101351 |