Title:
半導体装置
Document Type and Number:
Japanese Patent JP6700356
Kind Code:
B2
Abstract:
A highly reliable semiconductor device the yield of which can be prevented from decreasing due to electrostatic discharge damage is provided. A semiconductor device is provided which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide insulating layer over the gate insulating layer, an oxide semiconductor layer being above and in contact with the oxide insulating layer and overlapping with the gate electrode layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The gate insulating layer includes a silicon film containing nitrogen. The oxide insulating layer contains one or more metal elements selected from the constituent elements of the oxide semiconductor layer. The thickness of the gate insulating layer is larger than that of the oxide insulating layer.
Inventors:
Shunpei Yamazaki
Toshiyuki Miyamoto
Masashi Nomura
Takashi Hamochi
Kenichi Okazaki
Toshiyuki Miyamoto
Masashi Nomura
Takashi Hamochi
Kenichi Okazaki
Application Number:
JP2018176852A
Publication Date:
May 27, 2020
Filing Date:
September 21, 2018
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L29/786; H01L21/336; H01L27/146
Domestic Patent References:
| JP2009141002A | ||||
| JP3248569A | ||||
| JP6132302A | ||||
| JP2007220820A | ||||
| JP2009130209A | ||||
| JP2011124360A | ||||
| JP2011243971A | ||||
| JP2009060009A | ||||
| JP2011135066A |
Foreign References:
| WO2010098101A1 |