Title:
半導体装置
Document Type and Number:
Japanese Patent JP6754782
Kind Code:
B2
Abstract:
A semiconductor device includes: a substrate; a drift layer which is disposed on the substrate and has a groove; an underlayer which is disposed above the drift layer; a first opening which penetrates the underlayer to reach the drift layer; an electron transit layer and an electron supply layer which are disposed to cover the first opening; a second opening which penetrates the electron supply layer and the electron transit layer to reach the underlayer; a gate electrode which is disposed above the electron supply layer at a position corresponding to a position of the first opening; a source electrode which is disposed to cover the second opening and in contact with the underlayer; and a drain electrode which is disposed on a backside surface of the substrate. A bottom surface of the groove is closer to the substrate than a bottom surface of the first opening.
Inventors:
Daisuke Shibata
Toshiyuki Tamura
Masahiro Ishida
Toshiyuki Tamura
Masahiro Ishida
Application Number:
JP2017566942A
Publication Date:
September 16, 2020
Filing Date:
February 07, 2017
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H01L21/337; H01L21/28; H01L21/336; H01L21/338; H01L29/12; H01L29/41; H01L29/417; H01L29/47; H01L29/778; H01L29/78; H01L29/808; H01L29/812; H01L29/861; H01L29/868; H01L29/872
Domestic Patent References:
| JP2014209540A | ||||
| JP2011035072A | ||||
| JP2011100877A | ||||
| JP2012104568A | ||||
| JP2009272586A | ||||
| JP2004260140A | ||||
| JP2013183034A |
Foreign References:
| WO2015122135A1 |
Attorney, Agent or Firm:
Hiromori Arai
Eisaku Teratani
Shinichi Michisaka
Eisaku Teratani
Shinichi Michisaka