Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH01173644
Kind Code:
A
Abstract:
PURPOSE:To make an operation at room temperature easy and to reduce power consumption by a method wherein two or more barrier regions at a prescribed interval are formed in a current path between a source electrode and a drain electrode. CONSTITUTION:The following are formed: a source electrode 14 and a drain electrode 15 which have been formed on a substrate 13 at an appropriate interval; a gate electrode 17 used to control an electric current flowing between both electrodes 14, 15; two or more barrier regions 18 which have been formed in a current path between both electrodes 14, 15 at a prescribed interval and which have been formed by using a material whose band gap is larger than that of the substrate 13. When a voltage is impressed between the source electrode 14 and the drain electrode 15, a two-dimensional electron gas (an electron existence region whose thickness is substantially zero) 19 as a current path is formed at an interface between an n-AlGaAs layer 16 and a GaAs layer 12. By this setup, it is possible to operate this device at room temperature easily and to reduce power consumption.
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Inventors:
NAKAMURA OSAMU
BABA HISAYA
BABA HISAYA
Application Number:
JP33015187A
Publication Date:
July 10, 1989
Filing Date:
December 28, 1987
Export Citation:
Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L29/205; H01L21/338; H01L29/778; H01L29/78; H01L29/80; H01L29/812; (IPC1-7): H01L29/205; H01L29/78; H01L29/80
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