Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5526688
Kind Code:
A
Abstract:
PURPOSE:To prevent a malfunction of a device by implanting a capacity coupling preventings wiring in an insulation layer at a position of an over lapped portion to be connected to a fixed potential, in forming two signal lines partially overlapped through the medium of an insulation layer. CONSTITUTION:A signal electrode wiring 2 is diffusion-formed in a Si substrate 5 and an Al wiring 1 to be used for a signal electrode wiring is mounted through a SiO2 insulation film 4 thereon. In such a construction, when the insulation film 4 is formed, a capacity bond preventing electrode wiring 3 consisting of a multi- crystal Si is buried beforehand in the film 4 wherein the wiring 2 overlaps over the wiring 1 planely, and a potential in the region is sustained at a similar level to a fixed potential. According to such a construction, a malfunction due to the coupling capacity between two different signal electrodes can be prevented, and an informamation holding property is further improved and an integration density is also raised.
Inventors:
IIMA TSUTOMU
Application Number:
JP10031678A
Publication Date:
February 26, 1980
Filing Date:
August 16, 1978
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/768; H01L23/522; (IPC1-7): H01L21/90
Domestic Patent References:
| JPS5255881A | 1977-05-07 |