Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5673442
Kind Code:
A
Abstract:
PURPOSE:To increase the reliability of the automatic junction of the subject semiconductor device by a method wherein the positioning pattern of an insulating material is provided on the area of a metallized interior lead, excluding the point of the lead. CONSTITUTION:The positioning pattern is covered on all the sections, excluding the junction section, of a W-metallized layer 7' of the metallized interior lead on a ceramic substitute 1, and an Au plated layer 7'' is adhered on the layer 7'. In this constitution, a pattern recognition can be performed easily by making good use of the light and darkness between the white ceramic substrate and the positioning pattern, or between the black ceramic substrate and the Au plated layer 7'' located close to the tip of the positioning pattern, thereby enabling to obtain a high-speed automatic junction.
Inventors:
KUBOTA SHIGERU
Application Number:
JP15034179A
Publication Date:
June 18, 1981
Filing Date:
November 20, 1979
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/68; H01L21/60; (IPC1-7): H01L21/68
Domestic Patent References:
| JPS5279658A | 1977-07-04 |