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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5928373
Kind Code:
A
Abstract:

PURPOSE: To accumulate double information charges with the same capacitor area with a single crystal layer as one electrode of the capacitor by a method wherein the single cyrstal layer equal to a substrate and another insulation film are superposed on the insulation film at a part of the semiconductor substrate.

CONSTITUTION: An SiO2 thick film 105 is selectively formed by superposing a single crystal Si 103 on the SiO2 film 102 provided partially on the Si substrate 101. It is covered with an SiO2 film 106, and then an N+ layer 109 is formed by applying a resist mask 107, ion-implantation and heat treatment. A doped poly Si electrode 110 and an SiO2 111 are superposed oppsingly on the layer 109, and an SiO2 106 is removed. Next, a gate oxide film 113 and a poly Si gate electrode 114 are provided, ion implantation is performed, resulting in the formation of an N layer 115, covered with a PSG116, and then an Al wiring 117 is laid in connection ti the N layer 115. This constitution enables the capacitor part to be of a structure of halving and superposition; the substrate 101 and the poly Si electrode 110 are determined as opposed electrodes, and the area of 1/2 of normal one is enough to obtain a constant capacity value.


Inventors:
SAKAMOTO MITSURU
Application Number:
JP13831782A
Publication Date:
February 15, 1984
Filing Date:
August 09, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L27/10; H01L21/822; H01L21/8242; H01L27/04; H01L27/108; H01L29/78; (IPC1-7): G11C11/34; H01L27/04; H01L27/10; H01L29/78
Domestic Patent References:
JPS56107571A1981-08-26
Attorney, Agent or Firm:
Uchihara Shin



 
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