PURPOSE: To eliminate difficulties in power wiring arrangement in an LSI or ULSI and to enhance integrity by a method wherein a low-resistance layer is formed in a high-resistance substrate and the power terminals located in the surface of the high-resistance substrate is connected to the low-resistance substrate with the intermediary of the low-resistance layer so that the low-resistance substrate may be used as the power wiring for the CMOS circuit.
CONSTITUTION: Conductive material 23 establishes a low-resistance connection between a power terminal 20 and metal wiring 21 on a semiconductor substrate 2 and a high-density semiconductor substrate 1. Through the substrate 1, power is supplied to the components within an LSI, for example to a P channel MOS transistor 16. Serving as the conductive material is a low-resistance material such as an Si or polycrystalline Si layer of high N type impurity concentration (>1020cm-3), Al layer, W layer, or the like. A metal wiring 22 may be omitted when a roughly ohmic contact is established between P type impurity layer 5 and 23.
MASUHARA TOSHIAKI
SASAKI TOSHIO
SAKAI YOSHIO
HAGIWARA YOSHIMUNE
