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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS62205657
Kind Code:
A
Abstract:

PURPOSE: To obtain sufficient current gain in an HET, by using a strain super lattice, in which a semiconductor wherein scattering between valleys is hard to occur, is made to be one constituting semiconductor as a base, and forming another semiconductor constituting the strain super lattice so as to have a thin thickness in such a way that quantum mechanic reflection does not occur.

CONSTITUTION: InAs is effective as a semiconductor used for the base layer of an HET. As the structure of the base layer, InAs/GaAs is used. GaAs is put at every 25 so as to ease strain. In this method, misfit transfer does not occur even in misalignment of lattices of GaAs and InAs by 6.5%. When the thickness of the GaAs is made to be about three atomic layers, the quantum mechanic reflection of hot electrons in the base layer due to the use of heterojunction is sufficiently small. Thus, the heterojunction HET characterized by no effect of lattice misalignment and high current gain at room temperature is obtained.


Inventors:
MUTO SHUNICHI
Application Number:
JP4803886A
Publication Date:
September 10, 1987
Filing Date:
March 05, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/68; H01L29/15; H01L29/20; H01L29/76; (IPC1-7): H01L29/20; H01L29/68
Attorney, Agent or Firm:
Kugoro Tamamushi