Title:
Semiconductor devices and display devices
Document Type and Number:
Japanese Patent JP6317406
Kind Code:
B2
Abstract:
The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.
Inventors:
Shunpei Yamazaki
Kengo Akimoto
Shigeki Komori
Hideki Uochi
Nimura Tomoya
Kasahara Takahiro
Kengo Akimoto
Shigeki Komori
Hideki Uochi
Nimura Tomoya
Kasahara Takahiro
Application Number:
JP2016180092A
Publication Date:
April 25, 2018
Filing Date:
September 15, 2016
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/822; G02F1/133; G02F1/1345; G02F1/1368; H01L21/336; H01L27/04; H01L29/786; H01L51/50; H05B33/14; H05B44/00
Domestic Patent References:
| JP2004038130A | ||||
| JP2004273732A | ||||
| JP2001142096A | ||||
| JP2007316105A | ||||
| JP2007529119A | ||||
| JP2000066240A | ||||
| JP11174970A |
Foreign References:
| US20070146564 |