Title:
半導体装置、半導体ウェハ、記憶装置、及び電子機器
Document Type and Number:
Japanese Patent JP7224124
Kind Code:
B2
Abstract:
An object is to provide a semiconductor device with large memory capacity. The semiconductor device includes first to seventh insulators, a first conductor, and a first semiconductor. The first conductor is positioned on a first top surface of the first insulator and a first bottom surface of the second insulator. The third insulator is positioned in a region including a side surface and a second top surface of the first insulator, a side surface of the first conductor, and a second bottom surface and a side surface of the second insulator. The fourth insulator, the fifth insulator, and the first semiconductor are sequentially stacked on the third insulator. The sixth insulator is in contact with the fifth insulator in a region overlapping the first conductor. The seventh insulator is positioned in a region including the first semiconductor and the sixth insulator.
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Inventors:
Kimura Hajime
Tatsunori Inoue
Tatsunori Inoue
Application Number:
JP2018136563A
Publication Date:
February 17, 2023
Filing Date:
July 20, 2018
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/336; H01L21/28; H01L29/417; H01L29/423; H01L29/49; H01L29/786; H01L29/788; H01L29/792; H10B12/00; H10B41/27; H10B41/35; H10B41/70; H10B43/27; H10B43/35
Domestic Patent References:
| JP2013149694A | ||||
| JP2012009512A | ||||
| JP2017034144A | ||||
| JP2016058454A | ||||
| JP2011238333A | ||||
| JP2016225617A |
Foreign References:
| US20160268292 | ||||
| US20160284719 | ||||
| US20110309432 | ||||
| US20170040416 | ||||
| US20160071872 |